2. Invocation of generate-constraints.py

usage: generate-constraints [-h] [--boardfile BOARDFILE]
                            [--pinoutfile PINOUTFILE] [-b BIND] [-o OUTPUT]
                            [-f FPGA]

2.1. Named Arguments

--boardfile

Board description file (json)

--pinoutfile

Project description file (json)

Default: []

-b, --bind

Bind signal group to pin group

Default: []

-o, --output

Write output to file

-f, --fpga

Target FPGA Vendor

Default: “xilinx”